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・ Processional cross
・ Processional hymn
・ Processional walkway
・ Processivity
・ Processo contro ignoti
・ Processo per direttissima
・ Processo Revolucionário Em Curso
・ Processo Revolucionário Em Curso governing bodies
・ ProcessOn
・ Processor
・ Processor affinity
・ Processor array
・ Processor book
・ Processor consistency
・ Processor Control Region
Processor design
・ Processor Direct Slot
・ Processor register
・ Processor sharing
・ Processor supplementary capability
・ Processor Technology
・ Processor Value Unit
・ Processual archaeology
・ Processus
・ Processus (Kingdom of Hungary)
・ Processus pyramidalis
・ Processus vaginalis
・ ProcessWire
・ Procesí k Panence
・ Procetichthys kreffti


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Processor design : ウィキペディア英語版
Processor design

Processor design is the design engineering task of creating a microprocessor, a component of computer hardware. It is a subfield of electronics engineering and computer engineering. The design process involves choosing an instruction set and a certain execution paradigm (e.g. VLIW or RISC) and results in a microarchitecture described in e.g. VHDL or Verilog. This description is then manufactured employing some of the various semiconductor device fabrication processes. This results in a die which is bonded onto some chip carrier. This chip carrier is then soldered onto some printed circuit board (PCB).
The mode of operation of any microprocessor is the execution of lists of instructions. Instructions typically include those to compute or manipulate data values using registers, change or retrieve values in read/write memory, perform relational tests between data values and to control program flow.
== Details ==

CPU design focuses on six main areas:
# datapaths (such as ALUs and pipelines)
# control unit: logic which controls the datapaths
# Memory components such as register files, caches
# Clock circuitry such as clock drivers, PLLs, clock distribution networks
# Pad transceiver circuitry
# Logic gate cell library which is used to implement the logic
CPUs designed for high-performance markets might require custom designs for each of these items to achieve frequency, power-dissipation, and chip-area goals whereas CPUs designed for lower performance markets might lessen the implementation burden by acquiring some of these items by purchasing them as intellectual property. Control logic implementation techniques (logic synthesis using CAD tools) can be used to implement datapaths, register files, and clocks. Common logic styles used in CPU design include unstructured random logic, finite-state machines, microprogramming (common from 1965 to 1985), and Programmable logic arrays (common in the 1980s, no longer common).
Device types used to implement the logic include:
* Transistor-transistor logic Small Scale Integration logic chips - no longer used for CPUs
* Programmable Array Logic and Programmable logic devices - no longer used for CPUs
* Emitter-coupled logic (ECL) gate arrays - no longer common
* CMOS gate arrays - no longer used for CPUs
* CMOS mass-produced ICs - the vast majority of CPUs by volume
* CMOS ASICs - only for a minority of special applications due to expense
* Field-programmable gate arrays (FPGA) - common for soft microprocessors, and more or less required for reconfigurable computing
A CPU design project generally has these major tasks:
* Programmer-visible instruction set architecture, which can be implemented by a variety of microarchitectures
* Architectural study and performance modeling in ANSI C/C++ or SystemC
* High-level synthesis (HLS) or register transfer level (RTL, e.g. logic) implementation
* RTL verification
* Circuit design of speed critical components (caches, registers, ALUs)
* Logic synthesis or logic-gate-level design
* Timing analysis to confirm that all logic and circuits will run at the specified operating frequency
* Physical design including floorplanning, place and route of logic gates
* Checking that RTL, gate-level, transistor-level and physical-level representations are equivalent
* Checks for signal integrity, chip manufacturability
Re-designing a CPU core to a smaller die-area helps to shrink everything (a "photomask shrink"), resulting in the same number of transistors on a smaller die. It improves performance (smaller transistors switch faster), reduces power (smaller wires have less parasitic capacitance) and reduces cost (more CPUs fit on the same wafer of silicon). Releasing a CPU on the same size die, but with a smaller CPU core, keeps the cost about the same but allows higher levels of integration within one very-large-scale integration chip (additional cache, multiple CPUs, or other components), improving performance and reducing overall system cost.
As with most complex electronic designs, the logic verification effort (proving that the design does
not have bugs) now dominates the project schedule of a CPU.
Key CPU architectural innovations include index register, cache, virtual memory, instruction pipelining, superscalar, CISC, RISC, virtual machine, emulators, microprogram, and stack.

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
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